10 research outputs found

    Novel Fast-Speed Partial-Shading-Tolerant Flexible Power Point Tracking for Photovoltaic Systems with Explicit Key Points Estimation

    Get PDF
    Recent power curtailment-based photovoltaic (PV) flexible power point tracking (FPPT) algorithms mainly adopted intricate curve fitting or sophisticated curve-scanning mecha-nisms to ensure the grid supportive functionalities under partial shading conditions (PSCs), showing the limitations of mathe-matical solidity or system dynamics improvement. Accordingly, a novel fast-speed partial-shading-tolerant FPPT (PST-FPPT) algorithm is proposed in this paper. Regarding the proposed scheme, a modified explicit PV model is developed to express the key operation points with the assistance of several representative current-voltage samples from the initialization process, which is beneficial to computational burden reduction and irradiance sensors removal. Additionally, to guarantee the tracking speed to system dynamics, a set point estimation-based direct voltage regulation strategy is proposed in this paper, eliminating the redundant searching in approaching the predefined power com-mand. Simulation and experimental evaluations under various PSCs and operational circumstances validated the effectiveness of the proposed control

    Transient dc bias elimination of dual-active-bridge dc-dc converter with improved triple-phase-shift control

    No full text
    A transient dc-bias current due to the voltage-second imbalance of isolated bidirectional dual-active-bridge (DAB) converters for the disturbance in line or load may result in the transformer saturation and oscillations in both sides dc currents. This article focuses on the transient dc-bias current elimination by using an improved triple-phase-shift (ITPS) control for DAB converters. The inductor peak current stress optimization is adopted in the proposed ITPS to determine the steady-state phase-shift variables. Originated from the dc-bias current model of DAB converters with the TPS control, the transient phase-shift adjustment strategy can be determined, which has the ability to improve the inductor current changing slope and shorten the settling time. Both simulation and experiments for different conditions are provided to evaluate main dynamic indexes such as the transient period, dc-bias current, and inductor current stress for three different transition cases. The proposed ITPS is proved as a promising solution in eliminating the dc-bias current, minimizing the transient current stress

    Constant Power Load Stabilization With Fast Transient Boundary Control for DAB-Converters-Based Electric Drive Systems

    No full text
    Due to the negative incremental impedance of constant power loads (CPLs), many undesirable issues, such as the oscillations or even possible collapse of the main dc bus voltage, may occur, which may significantly degrade the system stability of electrical vehicles (EVs). This article presents a natural switching surface (NSS) fast transient boundary control (FTBC) based stabilization solution for EVs with dual active bridge (DAB) converters as the main power interface. Based on the mathematical models of multiple NSSs and characteristics of CPL, the proposed FTBC control can achieve stable operation of DAB converters feeding CPLs and fast dynamic response irrespective of operating stages, such as the startup, sudden voltage, and power reference changing conditions. Compared with other strategies, such as load shedding, the proposed FTBC has no additional requirements for hardware, which is cost-effective. The analytical derivation of the proposed algorithm under the CPL condition is presented together with simulation and experimental evaluations, which validate that the proposed FTBC is capable of achieving two times faster start-up process and at least 33% dynamic response improvement compared with proportional integrator closed-loop control while eliminating the dc-bias current and guaranteeing the CPL stability by regulating the dynamic trajectories of DAB converters in the geometric domain

    Monolithic GaN Half-Bridge Stages With Integrated Gate Drivers for High Temperature DC-DC Buck Converters

    No full text
    10.1109/ACCESS.2019.2958059IEEE Access7184375-18438

    Loss Balance and Transient DC-Bias Suppression Strategies in Three-Level DAB Converters Modulated With Five DoFs

    Get PDF
    In the three-level (3 L) neutral-point-clamped (NPC) dual-active-bridge (DAB) converter, both sides of the converter can adapt to higher DC bus voltage, and more control degrees of freedom (DoFs) are provided compared to the conventional DAB converter. In the PWM generating technique with 5 DoFs, loss imbalance may develop in inner switches and outer switches because the leading or lagging arm is introduced, affecting system reliability. In addition, the transient DC-bias issue may also arise in the 3L-NPC-DAB converter modulated with 5 DoFs, leading to the transformer saturation. In this paper, two strategies are proposed to suppress the loss imbalance and the transient DC-bias in the current stress and magnetizing branches. It is also general and applicable for SPS, DPS, and TPS modulations. Furthermore, the loss balance strategy and DC-bias suppression strategy are applied in the PWM generation technique simultaneously without additional components. With the proposed solutions, the loss imbalances of inner switches and outer switches are suppressed and DC-bias in the integral of voltages on both sides of the 3L-NPC-DAB converter is abolished. The effectiveness of the proposed strategies is validated by a series of experiments conducted under varying situations

    A monolithic GaN driver with a deadtime generator (DTG) for high‐temperature (HT) GaN DC‐DC buck converters

    Get PDF
    This paper presents a monolithic GaN driver with a deadtime generator (DTG) for half-bridge DC-DC buck converters. The proposed GaN integrated circuits (ICs) were fabricated in a 3 µm enhancement-mode GaN MIS-HEMTs process. The integrated DTG converter can operate at 250°C with a large gate swing of 10 V, and it exhibits a maximum efficiency of 80% at high temperatures, with VIN= 30 V at 100 kHz. The monolithic GaN DTG driver requires one control signal and generates a deadtime of fewer than 0.13 µs at high temperatures up to 250°C. The proposed DTG converter is compared to an integrated GaN converter without DTG (w/o) under various conditions. At high temperatures, the optimized GaN DTG converter shows better performance than the GaN converter w/o at high load currents, in terms of smaller voltage overshoots and better efficiency as well. This work demonstrates a simple GaN deadtime method for high temperature (HT) GaN power converters
    corecore